FIG. 1 illustrates an example of a related art power supply circuit. An output transistor Tr1 composed of a P channel MOS transistor, having a source that is coupled to power supply voltage VDD, outputs voltage Vo from a drain thereof. Power supply voltage VDD is supplied to an error amplifier 1. Output voltage Vo is divided by resistors R1 and R2 and inputted to a plus-side input terminal of the error amplifier 1. Reference voltage Vref is inputted to a minus-side input terminal of the error amplifier 1. The output of the error amplifier 1 is inputted to a gate of a buffer transistor Tr2 composed of a P channel MOS transistor. A source of the buffer transistor Tr2 is coupled via a constant current source to power supply voltage VDD and at the same time to a gate of the output transistor Tr1. A drain of the buffer transistor Tr2 is coupled to a ground.
As illustrated in FIG. 1, the power supply circuit includes an overcurrent protection circuit. The overcurrent protection circuit is the part surrounded by the dashed line in FIG. 1. The overcurrent protection circuit is coupled to a drain of a current detection transistor Tr3 and a gate of the buffer transistor Tr2. The current detection transistor Tr3 composed of a P channel MOS transistor is coupled to the output transistor Tr1 such that a gate and source are shared. A resistor R11 is provided between the drain of the current detection transistor Tr3 and the ground. A gate of a transistor Tr11 composed of an N channel MOS transistor is provided between the drain of the current detection transistor Tr3 and the resistor R11. A drain of the transistor Tr11 is coupled via a resistor R12 to power supply voltage VDD and at the same time to a gate of a transistor Tr12 composed of a P channel MOS transistor. A source of the transistor Tr11 is coupled to the ground. A source of the transistor Tr12 is coupled to power supply voltage VDD. A drain of the transistor Tr12 is coupled to the gate of the buffer transistor Tr2.
The operation of the power supply circuit and overcurrent protection circuit for the same will be described. When a fall of output voltage Vo causes the input voltage of the plus-side input terminal of the error amplifier 1 to fall below reference voltage Vref of the minus-side input terminal, the error amplifier 1 decreases the gate voltage of the buffer transistor Tr2. Then, the on-resistance of the buffer transistor Tr2 decreases and the gate voltage of the output transistor Tr1 lowers. Thus, the on-resistance of the output transistor Tr1 decreases, so that output voltage Vo is raised. Meanwhile, when a rise in output voltage Vo causes the input voltage of the plus-side input terminal of the error amplifier 1 to exceed reference voltage Vref of the minus-side input terminal, the error amplifier 1 raises the gate voltage of the buffer transistor Tr2. Then, the on-resistance of the buffer transistor Tr2 increases and the gate voltage of the output transistor Tr1 rises. Thus, the on-resistance of the output transistor Tr1 increases, so that output voltage Vo is lowered. In this way, output voltage Vo is kept constant.
When the output current of the output transistor Tr1 increases, the drain current of the current detection transistor Tr3 sharing the gate and source with the output transistor Tr1 increases. When the drain current of the current detection transistor Tr3 increases, the gate voltage of the transistor Tr11 rises due to the resistor R11. Then, the on-resistance of the transistor Tr11 decreases and the gate voltage of the transistor Tr12 lowers. Thus, the on-resistance of the output transistor Tr12 decreases, so that the gate voltage of the buffer transistor Tr2 rises substantially to power supply voltage VDD and the buffer transistor Tr2 is turned off. Consequently, the gate voltage of the output transistor Tr1 rises and the on-resistance thereof increases, whereby the overcurrent protection works.
In addition to the above technique, various types of techniques for overcurrent protection circuit for a power supply circuit have been proposed, such as Japanese Patent Laid-Open Nos. 2003-186554 and 2006-139673.
However, the related art power supply circuit as illustrated in FIG. 1 has a relatively long feedback path. More specifically, output overcurrent is monitored by the current detection transistor Tr3, and the gate voltage of the buffer transistor Tr2 is controlled through the transistors Tr11 and Tr12, and then the gate voltage of the output transistor Tr1 is controlled, whereby the overcurrent protection works. The response of the overcurrent protection circuit is delayed due to such a relatively long feedback path. Further, circuit oscillation is apt to occur, imposing a problem on the stability of circuit operation. Japanese Patent Laid-Open Nos. 2003-186554 and 2006-139673 do not disclose any measure for shortening the feedback path.